Beginner
10 min

Ensure instant access and consistent reliability of your data using CY14B101Q and PIC18F57Q43

Instantaneous data security: nvSRAM, where speed meets resilience

nvSRAM 2 Click with Curiosity Nano with PIC18F57Q43

Published Feb 13, 2024

Click board™

nvSRAM 2 Click

Dev. board

Curiosity Nano with PIC18F57Q43

Compiler

NECTO Studio

MCU

PIC18F57Q43

Experience data security in a flash with the speed of SRAM and the resilience of non-volatile technology in our nvSRAM

A

A

Hardware Overview

How does it work?

nvSRAM 2 Click is based on the CY14B101Q, a 1-Mbit nvSRAM organized as 128K words of 8 bits, each with a nonvolatile element in each memory cell from Infineon. The nvSRAM specifies one million endurance cycles for nonvolatile cells with data retention of a minimum of 20 years. All the reads and writes to nvSRAM happen to the SRAM, which gives nvSRAM the unique capability to handle infinite writes to the memory. Besides, the benefit of nvSRAM over serial EEPROMs is that all reads and writes to nvSRAM are performed at the SPI speed with zero cycle delay. Therefore, no wait time is required after any of the memory accesses. In the event of system power loss, data from the SRAM is transferred to its nonvolatile cell using energy stored in a capacitor labeled as C2.

During the Power-Up, data from the nonvolatile cell is recalled automatically in the SRAM array and available to the user. During the Power-Down, the endurance cycle is consumed only when data transfer happens from the SRAM cells to nonvolatile cells. The memory can be accessed through a standard SPI interface that enables high clock speeds up to 40 MHz with zero cycle delay read and write cycles. It also supports the two most common modes, SPI Mode 0 and 3, and 104 MHz SPI access speed with special instructions for the read operation. The CY14B101Q uses the standard SPI opcodes for memory access. In addition to the general SPI instructions for reading and writing, it provides four special instructions: STORE, RECALL, AutoStore Disable (ASDISB), and

AutoStore Enable (ASENB). In addition to this, the nvSRAM 2 Click also has an additional HOLD pin, routed to the PWM pin of the mikroBUS™ socket labeled as HLD, used to pause the serial communication with the device without having to stop the operation of the write status register, programming, or erasing in progress. This Click board™ can be operated only with a 3.3V logic voltage level. The board must perform appropriate logic voltage level conversion before using MCUs with different logic levels. Also, it comes equipped with a library containing functions and an example code that can be used as a reference for further development.

nvSRAM 2 Click hardware overview image

Features overview

Development board

PIC18F57Q43 Curiosity Nano evaluation kit is a cutting-edge hardware platform designed to evaluate microcontrollers within the PIC18-Q43 family. Central to its design is the inclusion of the powerful PIC18F57Q43 microcontroller (MCU), offering advanced functionalities and robust performance. Key features of this evaluation kit include a yellow user LED and a responsive

mechanical user switch, providing seamless interaction and testing. The provision for a 32.768kHz crystal footprint ensures precision timing capabilities. With an onboard debugger boasting a green power and status LED, programming and debugging become intuitive and efficient. Further enhancing its utility is the Virtual serial port (CDC) and a debug GPIO channel (DGI

GPIO), offering extensive connectivity options. Powered via USB, this kit boasts an adjustable target voltage feature facilitated by the MIC5353 LDO regulator, ensuring stable operation with an output voltage ranging from 1.8V to 5.1V, with a maximum output current of 500mA, subject to ambient temperature and voltage constraints.

PIC18F57Q43 Curiosity Nano double side image

Microcontroller Overview

MCU Card / MCU

default

Architecture

PIC

MCU Memory (KB)

128

Silicon Vendor

Microchip

Pin count

48

RAM (Bytes)

8196

You complete me!

Accessories

Curiosity Nano Base for Click boards is a versatile hardware extension platform created to streamline the integration between Curiosity Nano kits and extension boards, tailored explicitly for the mikroBUS™-standardized Click boards and Xplained Pro extension boards. This innovative base board (shield) offers seamless connectivity and expansion possibilities, simplifying experimentation and development. Key features include USB power compatibility from the Curiosity Nano kit, alongside an alternative external power input option for enhanced flexibility. The onboard Li-Ion/LiPo charger and management circuit ensure smooth operation for battery-powered applications, simplifying usage and management. Moreover, the base incorporates a fixed 3.3V PSU dedicated to target and mikroBUS™ power rails, alongside a fixed 5.0V boost converter catering to 5V power rails of mikroBUS™ sockets, providing stable power delivery for various connected devices.

Curiosity Nano Base for Click boards accessories 1 image

Used MCU Pins

mikroBUS™ mapper

NC
NC
AN
NC
NC
RST
SPI Chip Select
PD4
CS
SPI Clock
PC6
SCK
SPI Data OUT
PC5
MISO
SPI Data IN
PC4
MOSI
Power Supply
3.3V
3.3V
Ground
GND
GND
Data Transfer Pause
PB0
PWM
NC
NC
INT
NC
NC
TX
NC
NC
RX
NC
NC
SCL
NC
NC
SDA
NC
NC
5V
Ground
GND
GND
1

Take a closer look

Click board™ Schematic

nvSRAM 2 Click Schematic schematic

Step by step

Project assembly

Curiosity Nano Base for Click boards front image hardware assembly

Start by selecting your development board and Click board™. Begin with the Curiosity Nano with PIC18F57Q43 as your development board.

Curiosity Nano Base for Click boards front image hardware assembly
Charger 27 Click front image hardware assembly
PIC18F47Q10 Curiosity Nano front image hardware assembly
Prog-cut hardware assembly
Board mapper by product8 hardware assembly
Necto image step 2 hardware assembly
Necto image step 3 hardware assembly
Necto image step 4 hardware assembly
Necto image step 5 hardware assembly
Necto image step 6 hardware assembly
PIC18F57Q43 Curiosity MCU Step hardware assembly
Necto No Display image step 8 hardware assembly
Necto image step 9 hardware assembly
Necto image step 10 hardware assembly
Debug Image Necto Step hardware assembly

Track your results in real time

Application Output

1. Application Output - In Debug mode, the 'Application Output' window enables real-time data monitoring, offering direct insight into execution results. Ensure proper data display by configuring the environment correctly using the provided tutorial.

2. UART Terminal - Use the UART Terminal to monitor data transmission via a USB to UART converter, allowing direct communication between the Click board™ and your development system. Configure the baud rate and other serial settings according to your project's requirements to ensure proper functionality. For step-by-step setup instructions, refer to the provided tutorial.

3. Plot Output - The Plot feature offers a powerful way to visualize real-time sensor data, enabling trend analysis, debugging, and comparison of multiple data points. To set it up correctly, follow the provided tutorial, which includes a step-by-step example of using the Plot feature to display Click board™ readings. To use the Plot feature in your code, use the function: plot(*insert_graph_name*, variable_name);. This is a general format, and it is up to the user to replace 'insert_graph_name' with the actual graph name and 'variable_name' with the parameter to be displayed.

Software Support

Library Description

This library contains API for nvSRAM 2 Click driver.

Key functions:

  • nvsram2_hold - The function enables hold operation by setting the state of the HOLD ( PWM ) pin depending on the function argument.

  • nvsram2_set_cmd -The function sends desired command to the CY14B101Q2A memory on nvSRAM 2 click board.

  • nvsram2_read_id - The function performs the device ID read of the CY14B101Q2A memory on nvSRAM 2 click board.

Open Source

Code example

The complete application code and a ready-to-use project are available through the NECTO Studio Package Manager for direct installation in the NECTO Studio. The application code can also be found on the MIKROE GitHub account.

/*!
 * @file main.c
 * @brief nvSRAM2 Click example
 *
 * # Description
 * This is an example using nvSRAM 2 Click based on CY14B101Q which is combines a 1-Mbit nvSRAM with a
 * nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 128K words of 8 bits each.
 *
 * The demo application is composed of two sections :
 *
 * ## Application Init
 * Initializes SPI and UART LOG, sets CS and PWM pins as outputs. 
 * Disables hold, sets write enable latch, targets the memory address at 12345 ( 0x00003039 ) 
 * for burst write starting point and writes data which is also displayed on the log.
 *
 * ## Application Task
 * This is an example that demonstrates the use of the nvSRAM 2 Click board. In this example, the data is read from
 * the targeted memory address. The results are being sent to the Usart Terminal. This task repeats every 5 sec.
 *
 * @author Jelena Milosavljevic
 *
 */

#include "board.h"
#include "log.h"
#include "nvsram2.h"

static nvsram2_t nvsram2;
static log_t logger;
static char demo_data[ 9 ] = { 'm', 'i', 'k', 'r', 'o', 'E', 13 ,10 , 0 };
static char rx_data[ 9 ];
static uint32_t memory_addr; 

void application_init ( void ) {
    log_cfg_t log_cfg;               /**< Logger config object. */
    nvsram2_cfg_t nvsram2_cfg;       /**< Click config object. */

    /** 
     * Logger initialization.
     * Default baud rate: 115200
     * Default log level: LOG_LEVEL_DEBUG
     * @note If USB_UART_RX and USB_UART_TX 
     * are defined as HAL_PIN_NC, you will 
     * need to define them manually for log to work. 
     * See @b LOG_MAP_USB_UART macro definition for detailed explanation.
     */
    LOG_MAP_USB_UART( log_cfg );
    log_init( &logger, &log_cfg );
    Delay_ms ( 100 );
    log_info( &logger, " Application Init " );

    // Click initialization.

    nvsram2_cfg_setup( &nvsram2_cfg );
    NVSRAM2_MAP_MIKROBUS( nvsram2_cfg, MIKROBUS_1 );
    err_t init_flag  = nvsram2_init( &nvsram2, &nvsram2_cfg );
    if ( SPI_MASTER_ERROR == init_flag ) {
        
        log_error( &logger, " Application Init Error. " );
        log_info( &logger, " Please, run program again... " );

        for ( ; ; );
    }

    nvsram2_default_cfg ( &nvsram2 );
    log_info( &logger, " Application Task " );

    memory_addr = 12345;

    nvsram2_burst_write( &nvsram2, memory_addr, demo_data, 9 );
    log_printf( &logger, "-----------------------\r\n" );
    log_printf( &logger, "-> Write data : %s \r\n", demo_data );
    Delay_ms ( 100 );
}

void application_task ( void ) {
    nvsram2_burst_read( &nvsram2, memory_addr, rx_data, 9 );
    log_printf( &logger, "-----------------------\r\n"  );
    log_printf( &logger, "<- Read data  : %s \r\n", rx_data );
    Delay_ms ( 1000 );
    Delay_ms ( 1000 );
    Delay_ms ( 1000 );
    Delay_ms ( 1000 );
    Delay_ms ( 1000 );
}   

int main ( void ) 
{
    /* Do not remove this line or clock might not be set correctly. */
    #ifdef PREINIT_SUPPORTED
    preinit();
    #endif
    
    application_init( );
    
    for ( ; ; ) 
    {
        application_task( );
    }

    return 0;
}

// ------------------------------------------------------------------------ END

Additional Support

Resources

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