Ensure instant access and consistent reliability of your data using CY14B101Q and STM32F091RC
Instantaneous data security: nvSRAM, where speed meets resilience
Published Feb 26, 2024
Click board™
nvSRAM 2 Click
Dev Board
Nucleo-64 with STM32F091RC MCU
Compiler
NECTO Studio
MCU
STM32F091RC
Experience data security in a flash with the speed of SRAM and the resilience of non-volatile technology in our nvSRAM
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Hardware Overview
How does it work?
nvSRAM 2 Click is based on the CY14B101Q, a 1-Mbit nvSRAM organized as 128K words of 8 bits, each with a nonvolatile element in each memory cell from Infineon. The nvSRAM specifies one million endurance cycles for nonvolatile cells with data retention of a minimum of 20 years. All the reads and writes to nvSRAM happen to the SRAM, which gives nvSRAM the unique capability to handle infinite writes to the memory. Besides, the benefit of nvSRAM over serial EEPROMs is that all reads and writes to nvSRAM are performed at the SPI speed with zero cycle delay. Therefore, no wait time is required after any of the memory accesses. In the event of system power loss, data from the SRAM is transferred to its nonvolatile cell using energy stored in a capacitor labeled as C2.
During the Power-Up, data from the nonvolatile cell is recalled automatically in the SRAM array and available to the user. During the Power-Down, the endurance cycle is consumed only when data transfer happens from the SRAM cells to nonvolatile cells. The memory can be accessed through a standard SPI interface that enables high clock speeds up to 40 MHz with zero cycle delay read and write cycles. It also supports the two most common modes, SPI Mode 0 and 3, and 104 MHz SPI access speed with special instructions for the read operation. The CY14B101Q uses the standard SPI opcodes for memory access. In addition to the general SPI instructions for reading and writing, it provides four special instructions: STORE, RECALL, AutoStore Disable (ASDISB), and
AutoStore Enable (ASENB). In addition to this, the nvSRAM 2 Click also has an additional HOLD pin, routed to the PWM pin of the mikroBUS™ socket labeled as HLD, used to pause the serial communication with the device without having to stop the operation of the write status register, programming, or erasing in progress. This Click board™ can be operated only with a 3.3V logic voltage level. The board must perform appropriate logic voltage level conversion before using MCUs with different logic levels. Also, it comes equipped with a library containing functions and an example code that can be used as a reference for further development.
Features overview
Development board
Nucleo-64 with STM32F091RC MCU offers a cost-effective and adaptable platform for developers to explore new ideas and prototype their designs. This board harnesses the versatility of the STM32 microcontroller, enabling users to select the optimal balance of performance and power consumption for their projects. It accommodates the STM32 microcontroller in the LQFP64 package and includes essential components such as a user LED, which doubles as an ARDUINO® signal, alongside user and reset push-buttons, and a 32.768kHz crystal oscillator for precise timing operations. Designed with expansion and flexibility in mind, the Nucleo-64 board features an ARDUINO® Uno V3 expansion connector and ST morpho extension pin
headers, granting complete access to the STM32's I/Os for comprehensive project integration. Power supply options are adaptable, supporting ST-LINK USB VBUS or external power sources, ensuring adaptability in various development environments. The board also has an on-board ST-LINK debugger/programmer with USB re-enumeration capability, simplifying the programming and debugging process. Moreover, the board is designed to simplify advanced development with its external SMPS for efficient Vcore logic supply, support for USB Device full speed or USB SNK/UFP full speed, and built-in cryptographic features, enhancing both the power efficiency and security of projects. Additional connectivity is
provided through dedicated connectors for external SMPS experimentation, a USB connector for the ST-LINK, and a MIPI® debug connector, expanding the possibilities for hardware interfacing and experimentation. Developers will find extensive support through comprehensive free software libraries and examples, courtesy of the STM32Cube MCU Package. This, combined with compatibility with a wide array of Integrated Development Environments (IDEs), including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE, ensures a smooth and efficient development experience, allowing users to fully leverage the capabilities of the Nucleo-64 board in their projects.
Microcontroller Overview
MCU Card / MCU
Architecture
ARM Cortex-M0
MCU Memory (KB)
256
Silicon Vendor
STMicroelectronics
Pin count
64
RAM (Bytes)
32768
You complete me!
Accessories
Click Shield for Nucleo-64 comes equipped with two proprietary mikroBUS™ sockets, allowing all the Click board™ devices to be interfaced with the STM32 Nucleo-64 board with no effort. This way, Mikroe allows its users to add any functionality from our ever-growing range of Click boards™, such as WiFi, GSM, GPS, Bluetooth, ZigBee, environmental sensors, LEDs, speech recognition, motor control, movement sensors, and many more. More than 1537 Click boards™, which can be stacked and integrated, are at your disposal. The STM32 Nucleo-64 boards are based on the microcontrollers in 64-pin packages, a 32-bit MCU with an ARM Cortex M4 processor operating at 84MHz, 512Kb Flash, and 96KB SRAM, divided into two regions where the top section represents the ST-Link/V2 debugger and programmer while the bottom section of the board is an actual development board. These boards are controlled and powered conveniently through a USB connection to program and efficiently debug the Nucleo-64 board out of the box, with an additional USB cable connected to the USB mini port on the board. Most of the STM32 microcontroller pins are brought to the IO pins on the left and right edge of the board, which are then connected to two existing mikroBUS™ sockets. This Click Shield also has several switches that perform functions such as selecting the logic levels of analog signals on mikroBUS™ sockets and selecting logic voltage levels of the mikroBUS™ sockets themselves. Besides, the user is offered the possibility of using any Click board™ with the help of existing bidirectional level-shifting voltage translators, regardless of whether the Click board™ operates at a 3.3V or 5V logic voltage level. Once you connect the STM32 Nucleo-64 board with our Click Shield for Nucleo-64, you can access hundreds of Click boards™, working with 3.3V or 5V logic voltage levels.
Used MCU Pins
mikroBUS™ mapper
Take a closer look
Click board™ Schematic
Step by step
Project assembly
Start by selecting your development board and Click board™. Begin with the Nucleo-64 with STM32F091RC MCU as your development board.
Track your results in real time
Application Output
This Click board can be interfaced and monitored in two ways:
Application Output- Use the "Application Output" window in Debug mode for real-time data monitoring. Set it up properly by following this tutorial.
UART Terminal- Monitor data via the UART Terminal using a USB to UART converter. For detailed instructions, check out this tutorial.
Software Support
Library Description
This library contains API for nvSRAM 2 Click driver.
Key functions:
nvsram2_hold- The function enables hold operation by setting the state of the HOLD ( PWM ) pin depending on the function argument.nvsram2_set_cmd-The function sends desired command to the CY14B101Q2A memory on nvSRAM 2 click board.nvsram2_read_id- The function performs the device ID read of the CY14B101Q2A memory on nvSRAM 2 click board.
Open Source
Code example
The complete application code and a ready-to-use project are available through the NECTO Studio Package Manager for direct installation in the NECTO Studio. The application code can also be found on the MIKROE GitHub account.
/*!
* @file main.c
* @brief nvSRAM2 Click example
*
* # Description
* This is an example using nvSRAM 2 click based on CY14B101Q which is combines a 1-Mbit nvSRAM with a
* nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 128K words of 8 bits each.
*
* The demo application is composed of two sections :
*
* ## Application Init
* Initializes SPI and UART LOG, sets CS and PWM pins as outputs.
* Disables hold, sets write enable latch, targets the memory address at 12345 ( 0x00003039 )
* for burst write starting point and writes data which is also displayed on the log.
*
* ## Application Task
* This is an example that demonstrates the use of the nvSRAM 2 click board. In this example, the data is read from
* the targeted memory address. The results are being sent to the Usart Terminal. This task repeats every 5 sec.
*
* @author Jelena Milosavljevic
*
*/
#include "board.h"
#include "log.h"
#include "nvsram2.h"
static nvsram2_t nvsram2;
static log_t logger;
static char demo_data[ 9 ] = { 'm', 'i', 'k', 'r', 'o', 'E', 13 ,10 , 0 };
static char rx_data[ 9 ];
static uint32_t memory_addr;
void application_init ( void ) {
log_cfg_t log_cfg; /**< Logger config object. */
nvsram2_cfg_t nvsram2_cfg; /**< Click config object. */
/**
* Logger initialization.
* Default baud rate: 115200
* Default log level: LOG_LEVEL_DEBUG
* @note If USB_UART_RX and USB_UART_TX
* are defined as HAL_PIN_NC, you will
* need to define them manually for log to work.
* See @b LOG_MAP_USB_UART macro definition for detailed explanation.
*/
LOG_MAP_USB_UART( log_cfg );
log_init( &logger, &log_cfg );
Delay_ms( 100 );
log_info( &logger, " Application Init " );
// Click initialization.
nvsram2_cfg_setup( &nvsram2_cfg );
NVSRAM2_MAP_MIKROBUS( nvsram2_cfg, MIKROBUS_1 );
err_t init_flag = nvsram2_init( &nvsram2, &nvsram2_cfg );
if ( SPI_MASTER_ERROR == init_flag ) {
log_error( &logger, " Application Init Error. " );
log_info( &logger, " Please, run program again... " );
for ( ; ; );
}
nvsram2_default_cfg ( &nvsram2 );
log_info( &logger, " Application Task " );
memory_addr = 12345;
nvsram2_burst_write( &nvsram2, memory_addr, demo_data, 9 );
log_printf( &logger, "-----------------------\r\n" );
log_printf( &logger, "-> Write data : %s \r\n", demo_data );
Delay_ms( 100 );
}
void application_task ( void ) {
nvsram2_burst_read( &nvsram2, memory_addr, rx_data, 9 );
log_printf( &logger, "-----------------------\r\n" );
log_printf( &logger, "<- Read data : %s \r\n", rx_data );
Delay_ms( 5000 );
}
void main ( void ) {
application_init( );
for ( ; ; ) {
application_task( );
}
}
// ------------------------------------------------------------------------ END
