Be the best in high-speed CAN industrial applications with ATA6570 and STM32F446RE

ATA6570 Click uses the ATA6570, a standalone high-speed CAN transceiver IC from Microchip, with partial networking support. This IC supports CAN and recently established CAN FD protocols, up to 1Mbit/s and 5Mbit/s, respectively. The communication inside the CAN bus is differential and performed through the twisted pairs with the characteristic impedance of 120Ω. The CANH and CANL drivers drive the differential lines. This provides robustness and immunity to electromagnetic interferences, typically observed in automotive systems. The ISO 11898 standard defines a signal line of twisted-pair cable as the network topology, terminated by the resistors with the characteristic impedance of the CAN bus (120Ω) at both ends - to prevent signal reflection. The dominant/recessive states are used for the message priority arbitration - the node which transmits the signal with the higher priority (the lower the binary message identifier number, the higher the priority) will win the arbitration, and the node with the lower priority will abort the transmission, waiting for the bus to become available again. Since the high logic level on the CAN line is considered recessive, the TXD line has an internal pull-up resistor, making the ATA6570 device stay recessive if the pin is left floating. The ATA6570 device can be driven in the recessive or dominant state with the TXD pin: when the TXD pin is at the VCC level and works in Normal mode, the drivers at the CANH and CANL pins are turned off. These pins are biased at 2.5 (VCC/2), with respect to the GND, provided by the internal autonomous bus biasing circuitry, and the CAN driver is in a recessive state. Pulling the TXD pin to the GND will activate the CANH and CANL drivers and set the bus to the dominant state.

A TXD dominant timeout timer is started when the TXD pin is set to low. If the low state on the TXD pin persists for longer than the predetermined time, the transmitter will be disabled, releasing the bus lines to the recessive state. This function prevents the hardware or software failure from driving the bus lines to a permanent dominant state, blocking all network communications. When the device is in the Sleep or Unpowered mode, the drivers will become highly resistive, rendering the device passive and completely ignored by the CAN bus network. Although the RXD and TXD lines are interfaced with the microcontroller, the SPI bus sets the internal registers, such as the partial networking registers and other status and configuration-related registers. The provided MikroElektronika library contains functions to easily set the parameters via the SPI bus and establish communication with the nodes. Partial networking allows selective wake-up of ATA6570 Click. Dedicated predefined frames can wake the device if configured to accept these frames. For this reason, when the device is in Standby or Sleep mode, it will still actively monitor the bus for those frames. SPI can set the wake-up CAN frame ID and data. Besides waking up the device by the partial networking feature, the device can also be woken up by a remote wake-up pattern on the CAN bus or with the onboard switch connected to the WAKE pin of the ATA6570 IC. Another wake-up source can be the SPI command for those modes where the SPI module is active and the remote wake-up pattern on the CAN bus. When in Sleep, MCU Reset or Power Off mode, the INH pin, which is routed to the external regulators, will be turned off, reducing the power consumption of the

external elements. The #SHDN (shutdown) pins of the two LDO regulators found on the ATA6570 Click are connected to the INH pin. Both regulators take power from the car battery connector (VS pin), providing 5V and 3.3V for custom needs. Outputs of those LDOs are routed via the SMD jumpers that can be populated so that the LDOs can be used to power up the mikroBUS™ 3.3V and 5V power rails. However, it should be noted that MikroElektronika does not advise powering up its systems this way - that is why these jumpers are left unpopulated by default. Overtemperature mode is activated when the device's temperature becomes too high, and the device was previously working in Normal mode. The ATA6570 provides two levels of overtemperature protection. When the first temperature level threshold is reached, an alarm is in the form of an interrupt on the RX pin (if set) and an appropriate status bit. If the temperature rises, the device will shut down the CAN drivers. Microcontroller Reset mode utilizes an integrated watchdog. When the watchdog event occurs, it will trigger a pulse on the INH pin - this pin will be turned off for a predetermined period, performing a power cycle reset on all devices connected via the ATA6570 click LDOs. This is a power cycle reset measure for a custom system powered via the mikroBUS™ socket. The onboard SMD jumper labeled as the VIO SEL selects which voltage rail of two LDO regulators will be used as the logic voltage level (SPI, UART). It offers voltage selection between 3.3V and 5V so that the click board™ can be interfaced with both the 3.3V and 5V capable MCUs.

Nucleo-64 with STM32F446RE MCU offers a cost-effective and adaptable platform for developers to explore new ideas and prototype their designs. This board harnesses the versatility of the STM32 microcontroller, enabling users to select the optimal balance of performance and power consumption for their projects. It accommodates the STM32 microcontroller in the LQFP64 package and includes essential components such as a user LED, which doubles as an ARDUINO® signal, alongside user and reset push-buttons, and a 32.768kHz crystal oscillator for precise timing operations. Designed with expansion and flexibility in mind, the Nucleo-64 board features an ARDUINO® Uno V3 expansion connector and ST morpho extension pin

headers, granting complete access to the STM32's I/Os for comprehensive project integration. Power supply options are adaptable, supporting ST-LINK USB VBUS or external power sources, ensuring adaptability in various development environments. The board also has an on-board ST-LINK debugger/programmer with USB re-enumeration capability, simplifying the programming and debugging process. Moreover, the board is designed to simplify advanced development with its external SMPS for efficient Vcore logic supply, support for USB Device full speed or USB SNK/UFP full speed, and built-in cryptographic features, enhancing both the power efficiency and security of projects. Additional connectivity is

provided through dedicated connectors for external SMPS experimentation, a USB connector for the ST-LINK, and a MIPI® debug connector, expanding the possibilities for hardware interfacing and experimentation. Developers will find extensive support through comprehensive free software libraries and examples, courtesy of the STM32Cube MCU Package. This, combined with compatibility with a wide array of Integrated Development Environments (IDEs), including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE, ensures a smooth and efficient development experience, allowing users to fully leverage the capabilities of the Nucleo-64 board in their projects.